1. Field of Invention
The present invention relates to a transient voltage suppression (TVS) device and a manufacturing method thereof; particularly, it relates to such TVS device and manufacturing method thereof, which mitigates a side-wall capacitance and a parasitic transistor effect.
2. Description of Related Art
A transient voltage suppression (TVS) device is an electro-static discharge (ESD) protection device, which includes a Zener diode and at least one PN diode. Please refer to U.S. Pat. No. 5,880,511 and US 2007/0073807 as related art. The prior art TVS device has a high capacitance, which delays the response time of the TVS device. In particular, in an operation range of a relatively lower clamp voltage, the high capacitance does not only delay the response time, but also causes the clamp voltage of the TVS device to be unstable.
In view of the above, the present invention proposes a TVS device and a manufacturing method thereof to mitigate a side-wall capacitance and a parasitic transistor effect therein.